Described below is the result of some work
mainly in the field of radio and
microwave electronics.
Copyright Daniel Uppström / SM6VFZ
Updated December 2010
December 2010: Fractional-N PLL
I am playing with new small frequency synthesizer boards that can lock at any frequency between 1 and 4 GHz (depending on component choice) in Hz-resolution.
The boards include a discrete VCO, fractional-N PLL chip HMC700LP4 from Hittite, AVR microcontroller, TCXO, keyable amplifier.
I will post more info here when ready.
October 2010: 10 GHz Rainscatter
A movie clip of a setup for 10 GHz. Listening to beacons through rainscatter.
The beacons received are SK6YH/B and SK6MHI. In the beginning both beacons are heard primarily through rain scatter (RS) but after a few minutes when the rain cloud has moved away, SK6MHI is heard mostly from reflections on solid objects, causing the tone to shift from the noise that is characteristic for RS, to a pure tone.
The transverter is completely home built and IF is at 144 MHz.
Antenna is a small horn.
Having a nice PLL source for up to 3 GHz I wanted to go higher by multiplication. The HEMT FET NE32584 took care of the job, multiplying by four.
Click the pic or headline for full article.
January 2009: Power Management
It is nice to have many voltage regulators and open-drain outputs that are sequentially turned on/off for transmit and receive in a transverter.
Schematic is available by asking...
2008: 1-3 GHz Frequency Synthesizer Board
This is a PLL synthesizer board containing VCO, TCXO, PLL chip and everything else necessary to generate any LO-signal between 1 and 3 GHz (components in VCO frequency dependent). Using ADF4106 PLL-chip for very low phase-noise.
Full article with schematics and measurment results was published in DUBUS 4/08.
If there is enough interest I might consider supplying a kit or assembled units. Please let me know if you would be interested.
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It is excellent as LO source for a 1296 or 2320 MHz transverter board:
March 2007: Experiments with DDS
A few AD9953 DDS chips were bought on eBay and a design was made. These chips are specified for a clock frequency up to 400 MHz and can make an LO for 144 MHz with sub-Hz resolution.
Some comments:
* The maximum clock frequency seems in fact to be above 500 MHz.
* Spurious free dynamic range is some 50 dB according to the data sheet, but this is hard to achieve since the internal synchronization clock produces heavy spurrs unless the analog and digital supply (including grounding and decoupling) is perfectly separated. So far only a little more than 40 dB has been achieved with the present design.
* Using the internal PLL clock-multiplier is disastrous with regard to phase noise in an high-performance application.
August 2005: Release of
Salut version 1.0.1,
a RF/microwave s-parameter
manipulation program with some useful features.
(click
to see a high resolution pic)
L-Band
Oscillator Chain (L-Band
Oszillator Kette)
Article and schematics originally published in Dubus
1/2004
_ 
(click
to see a high resolution pic)
Misc. in Swedish